1. Field
Exemplary embodiments of the present invention relate to a semiconductor device, and more particularly, to a semiconductor device with self-aligned air gaps and a method for fabricating the same.
2. Description of the Related Art
In general, a semiconductor device includes first conductive structures and second conductive structures, wherein each of the second conductive structures is formed between, for example, two first conductive structures and a dielectric layer is interposed between the first and second conductive structures. For example, the first conductive structures may include gates, bit lines, metal lines, or the likes, and the second conductive structures may include contact plugs, storage node contact plugs, bit line contact plugs, vias, or the likes.
As a semiconductor device is highly integrated, a distance between the first conductive structure and the second conductive structure gradually decreases. Due to this, the parasitic capacitance between the first conductive structure and the second conductive structure increases. As the parasitic capacitance increases, the operation speed of a semiconductor device slows down, and the refresh characteristic thereof deteriorates.
In order to reduce parasitic capacitance, a method for decreasing the dielectric constant of a dielectric layer has been suggested. A dielectric layer generally used in a semiconductor device includes silicon oxide or silicon nitride. The dielectric constant of the silicon oxide may be about 4, and the dielectric constant of the silicon nitride may be about 7.
Since the silicon oxide and the silicon nitride have still high dielectric constants, limitations may exist in reducing parasitic capacitance. While substances with relatively low dielectric constants have been developed, the reality may be that the dielectric constants of these substances are not so low.